- 延遲鎖定
- delay: vt. 延遲，拖延，耽擱。 We'll delay th ...
- lock: lock2 n. 1.一綹卷發(fā)。 〔pl.〕 ...
- delay lock loop: 延遲鎖定環(huán)
- delay lock loop，dll: 延遲鎖定回路
- delay-lock loop: 遲延鎖定環(huán)
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delay lock中文什么意思
- 延遲鎖定
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例句與用法
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- Firstly , the principle and realization of the step acquisition and delay locked loop are discussed
首先，論文討論了步進(jìn)捕獲延遲鎖定環(huán)的原理及實現(xiàn)機(jī)理。 - The principle of large step fast acquisition and the circuit design of large step fast acquisition delay lock loop ( lsdll ) are disgussed as the emphasis
本文著重從理論和電路設(shè)計兩方面對大步進(jìn)快速捕獲方法和大步進(jìn)快速捕獲延遲鎖定環(huán)進(jìn)行討論。 - In the second part , some of the multipath mitigation techniques widely used presently are analysed and compared with each other , from which we select the medll ( multipath estimating delay lock loop ) technique as the multipath mitigation algorithm in scope of signal processing in the receivers
第二部分通過對目前常用的多徑消除技術(shù)進(jìn)行分析與比較,選擇了medll技術(shù)作為接收機(jī)信號處理階段的多徑消除算法。 - There are two uncertain factor about it : the phase of the pn code and the doppler - shift . after capturing the received signal successfully , the traditional ds receiver always uses a delay locked loop ( dll ) to synchronize the pn code and then uses a costas loop to realize the carrier synchronization . this complex closed - loop structure not only take long time to realize the synchronization , but also has the defect of “ hang up ”
傳統(tǒng)的擴(kuò)頻接收機(jī)通常在捕獲偽碼信號后利用遲早門鑒相的延時鎖定環(huán)來實現(xiàn)偽碼的精同步,解擴(kuò)后利用科斯塔斯環(huán)實現(xiàn)載波同步,這種閉環(huán)結(jié)構(gòu)不僅同步時間長、結(jié)構(gòu)復(fù)雜,而且鎖相環(huán)還存在所謂的“ hang - up ”現(xiàn)象。 - Chapter one introduces the recent development of usb2 . 0 and the overall architecture of transceiver interface ; chapter two proposes the design flow and design style ; chapter three presents the whole system and module partition ; chapter four emphasizes on the dual - mode transmitter circuit , and gives out the simulation waveforms ; chapter five focuses on the design of over - sampling receiver and dll ( delay locked loop ) module ; chapter six designs the band - gap reference circuit . in the end , it concludes the design , and estimates the trend of usb . the dissertation is emphasized on dual - mode transmitter architecture , implementation of high speed dll using dba ( digital - based analog ) technology and a new design methodology for complex digital modules in mixed - signal circuit
本文第一章介紹了usb2 . 0的發(fā)展現(xiàn)狀和收發(fā)器接口芯片系統(tǒng)；第二章介紹了該芯片的設(shè)計流程和風(fēng)格；第三章介紹了該接口芯片的總體構(gòu)架以及模塊劃分；第四章著重介紹雙模發(fā)送器電路設(shè)計并給出了仿真驗證波形；接下來第五章分析了過采樣接收器的設(shè)計并對其中的dll ( delaylockedloop )模塊設(shè)計進(jìn)行了詳細(xì)的分析；第六章介紹了本芯片內(nèi)置的基準(zhǔn)電壓源的設(shè)計；最后對本文的設(shè)計一個總的回顧和總結(jié)，并展望下一代usb的發(fā)展方向。